Printing any UVM register in nice table format during write & read operation

In higher verbosity, we can use a uvm_reg_callback to print the register info in a nice format(shown below) during write/read.  This will make our debug easier from the logs.  
It's a generic callback and you can plug-in to any env. 
This will print the information for any uvm_reg write/read,. 

We need to do 2 things.
1. Create or Copy-paste the following reg_callback class in a file. In the following code, I've written the code to print the reg info before reg write(pre_write) and after reg read(post_read). You can edit it the way you want.

///////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////

class global_reg_callback extends uvm_reg_cbs;

  `uvm_object_utils( global_reg_callback )

  uvm_reg u_reg;

  function new( string name = "global_reg_callback" );

    super.new( name );

  endfunction: new

  virtual task pre_write( uvm_reg_item rw );

    bit                        sour;

    $cast(u_reg, rw.element);

    `uvm_info( "pre_write", $sformatf( "%s ", u_reg.sprint()), UVM_HIGH )

  endtask: pre_write

  virtual task post_read( uvm_reg_item rw );

    bit                        sour;

    $cast(u_reg, rw.element);

    `uvm_info( "post_read", $sformatf( "%s ", u_reg.sprint()), UVM_HIGH )

  endtask: post_read

endclass: global_reg_callback

///////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////

2. Add the following code to your env class.

///////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////

global_reg_callback              global_reg_cbs;

function void env::build_phase(uvm_phase phase);

   super.build_phase(phase);

   global_reg_cbs = global_reg_callback::type_id::create("global_reg_cbs", this);

endfunction

function void env::start_of_simulation_phase(uvm_phase phase);

   super.start_of_simulation_phase(phase);

   //Add the callback to print the reg info in the table format during write/read

   uvm_callbacks#(uvm_reg, uvm_reg_cbs)::add(null, global_reg_cbs);

endfunction : start_of_simulation_phase

///////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////

Happy debugging !!!